Digital TV set-top box design based on CX2443x decoding core (Figure)

At present, broadcast television is in the transition from analog technology to digital technology, one-way broadcast to two-way interactive transmission, and basic business to expansion and value-added services. Digital cable set-top boxes are the product of this stage of development. With the set-top box, people can not only watch digital TV programs with the original analog TV, but also use the digital set-top box interactive function to obtain electronic program guide (EPG), video on demand (VOD), e-mail, data broadcasting, distance education and other value-added. service. In specific operation, a set-top box needs to be installed on the analog TV of the user terminal to complete the access of the digital television signal and data, and the decoding output of the video and audio signals is completed. This article describes the hardware design of the set-top box system.

Device selection

In addition to satisfying the basic receiving digital TV function, the chip must be able to enable users to achieve high-speed Internet access through the cable TV network, that is, to have two basic application modules: STB and Cable Modem. According to this demand, this design chose CONEXANT's interactive digital TV set-top box single chip CX24430 as the core to design the whole system.

Overall structure of the system

The system is based on the CX24430 chip, and includes a cable tuner (Tuner), an upstream power amplifier, a flash memory for curing programs and storing program parameters, SDRAM, EEPROM, audio DAC, and audio and video output for processing and storing data with the CPU. Circuits and power supply units, etc. In addition, there are Multi-ICE interfaces for software debugging and RS23 interfaces for terminal monitoring, as well as USB interfaces, 1394 interfaces, and Ethernet physical layer RJ45 interfaces. The system structure block diagram is shown in Figure 1.

Figure 1 Block diagram of the set-top box terminal system

The main innovation of this system design is that the system adopts dual CPU architecture, which independently supports the operation of Cable Modem and system applications. The basic workflow is that after the digital TV signal is transmitted from the TV station to the user via the cable, it takes a number of processes to recover the original image and sound. First, channel demodulation and decoding are performed, and then the output stream is subjected to source decoding, including demultiplexing, audio and video decoding, graphics processing, video encoding, and audio DAC.

Main module hardware design

1 System front-end access part design

The front-end radio access signals of the integrated service digital cable TV dual-mode set-top box mainly include data streams (including audio and video and IP networks) in the downlink, downlink data streams and uplink data streams (including in-band and out-of-band); The channel with in-band frequency is used to transmit audio, video and IP network data. The channel with out-of-band frequency is mainly used to transmit the control parameters and interaction information of the cable modem terminal system (CMTS) at the head end of the CATV network and the set-top box of the user terminal. Moreover, various information and data are processed in parallel on the HFC network by frequency division multiplexing and time division multiplexing.

The design of the front-end access part is shown in Figure 2. Among them, PMX1338C is an integrated module that receives RF signals, including LNA low noise amplifier, diplexer (separating transmit and receive RF signals) and signal splitter (distributing downlink signals to corresponding ports); MT1530 contains reverse Mixing filtering and upstream signal power amplification; the CX2443x is used for digital decoding and encoding and output to an external interface.

Figure 2 system front-end access circuit diagram

Figure 3 The set-top box accepts the system back-end circuit diagram

Audio and video output part circuit design

In the set-top box receiving system, the video and audio decoders of the CX2443x back-end subsystem form the system audio and video output interface; the decoded audio and video signals are transmitted from the semiconductor crystal to the stereo DAC CS4335, or from the dual audio/video signal switch to CX2161R. The circuit of the audio and video signal output part is shown in Figure 3.

The principle and circuit design of audio and video decoding

1 audio and video signal decoding processing flow

The primary goal of digital television technology is to improve the quality of the transmitted image. After the related modification of the digital cable TV, not only the quality of the transmitted image but also the number of transmitted images are improved. The CX2443x is a highly integrated monolithic IC that includes a complete STB back-end subsystem and CM subsystem on a single chip. Its back-end subsystem includes a video decoder, an audio decoder, three multi-standard transport stream demultiplexers, and a high-performance embedded 32-bit ARM920T RISC processor with integrated peripheral I/O interfaces. The CX2443x on-chip digital TV decoding core is capable of fully decoding the audio and video stream signals and ultimately outputting digital video and audio signals to the encoding module.

The processing of the signal flow is shown in Figure 4. The audio and video signal transmission stream of MPEGII format or other format that has completed demodulation and channel decoding enters the DTDC subsystem in the demultiplexing module, and it contains the basic code stream of audio and video, synchronization information, program navigation and decryption information. The demultiplexing analyzer identifies these different formats of data and delivers data in each format to the corresponding memory buffer. The program navigation and decryption information is then sent to the DTDC external host; the basic code stream of the audio and video is sent to the dedicated SDRAM and transmitted to the corresponding decoder through the storage bridge to output the decoded digital signal of the audio and video; the synchronization information is Delivered to an audio and video sync machine.

Figure 4 Digital TV digital decoding subsystem structure

2 circuit design realization of audio and video decoding module

The CX2443x and other sub-chips and the crystal oscillator circuit cooperate to complete the decoding process of the signal. As shown in Figure 5, this part of the design mainly includes the audio and video signal module, the circuit connection of the JTAG port for system debugging, and some peripheral circuits. The CX2443x chip outputs the digitally decoded audio and video to the corresponding encoding module. The JTAG port is used to connect external debugging devices. In the actual circuit design, attention should be paid to the cooperation of the external crystal oscillator circuit.

Figure 5 circuit of audio and video decoding module

Set-top box audio and video decoding test

After preliminary testing, the prototype was designed to meet the following criteria: channel decoding followed DVB-C EN300 429; video decoding followed MPEG-2 Video (MP@ML) and MPEG-1 Video; audio decoding followed MPEG-2, MPEG-1 and Linear PCM. The image after the digital television signal decoding process is as shown in FIG. 6.

Figure 6 Display of the decoded image

references:

[1]. MT1530 datasheet http://