The LMX2531 series products are widely used in wireless communication base station systems. Compared with integer frequency division, fractional frequency division can achieve better phase noise performance, but fractional frequency division can cause spurious problems, especially integer boundary spurs. This paper describes an improvement in integer boundary spurs up to 10dB on the basis of ensuring phase noise performance as much as possible. 1. Proposal for integer boundary spurs of fractional divider Compared to the integer frequency division synthesis technique, the fractional frequency synthesis technique generates a higher phase discrimination frequency through a smaller N division ratio. Among them, the delta-sigma fractional division technique is the most widely used. According to the following phase noise formula 1.1, the smaller frequency division N can improve the phase noise performance of the output signal, which is also the charm of the fractional frequency synthesis technology in recent years. Based on good phase noise performance, the spur of the fractional divide technique is more complex than the integer divide technique. The application document 1879 "FracTIonal N Frequency Synthesis" written by TI's Dean Banerjee has a very detailed explanation of the principle of spurious generation and the corresponding countermeasures, and will not be elaborated here. For the most serious integer boundary spurs in fractional spurs, the processing method in this paper is frequency evasive. This processing method increases the application complexity of RF local oscillator in mobile communication base stations. This article takes the LMX2531 series widely used in the industry as an example. Through the LMX25312080EVAL evaluation board, combined with the design simulation software clock design tool and the register configuration software codeloader4, the integer boundary spurs are optimized in the original design, and finally 10dB improvement is achieved. 2. Optimal design of integer boundary spurs for fractional divider Figure 1 shows the original design, designed with the clock design tool software, with a loop bandwidth of 11 kHz and a phase margin of 42.4 degrees. Figure 2 shows the topology of the loop filter. Table 1 shows the phase noise and spurious measurement results of the circuit. Figure 1 LMX2531LQ2080 original design Figure 2 original design Table 1 original design performance test results When the numerator is 1 or FDEN-1 spurs, ie integer boundary spurs, is the worst case of all spurs, especially as the transmitting local oscillator of the GSM base station, this spurious or higher harmonic spur of the LMX2531 It will be transmitted through the mixer or IQ modulator and will not meet the emission spectrum template requirements. The suppression of @40kHz spurs is enhanced by reducing the loop bandwidth, but too small a loop bandwidth can seriously affect the lock-in time of the phase-locked loop. Try to change the loop parameters related to the spurs and find that reducing the phase-detection frequency will significantly improve the spur of @40kHz. In the original design, the other parameters are not changed, and the phase-resolving frequency and the corresponding fractional denominator are reduced to ensure that the numerator is 1 The 1966.12MHz signal is still output. Table 2 is the test results. Table 2 Spurious test results Through the above test results, it is found that the integer boundary spurs have a very significant improvement. Figure 3 is a redesigned optimization design based on a 3.84MHz phase-detection frequency with a loop bandwidth of 11.5kHz and a phase margin of 39 degrees. Figure 3 Integer boundary spur optimization design 1 The performance test results of the output signal 1966.12MHz signal are shown in Table 3. Table 3 Performance results of optimized design 1 To meet the 10dB spurious optimization goal, the parameters shown in Figure 4 were redesigned with a loop bandwidth of 8kHz and a phase margin of 43 degrees. Figure 4 Integer boundary spur optimization design 2 The performance test results are shown in Table 4. Table 4 Performance results of optimized design 2 Summary In this paper, the LMX2531LQ2080E is used as an example to provide an optimal integer boundary spur in optimizing the fractional fraction, instead of using frequency evasion. An integer boundary spurious performance improvement of up to 10 dB is achieved at the expense of 0.26 degree phase noise degradation. Of course, methods such as reducing the charge pump current and reducing the loop bandwidth will also improve the integer boundary spurs. However, experimental results show that the reduction of the charge pump current is very limited, and the small charge pump current will also be phase noise. Performance has a large impact; too narrow loop bandwidth will result in longer loop lock times, which has a limiting effect on the application of phase-locked loop technology. So if the phase noise performance requirements are not exceptionally harsh, try a smaller phase-detection frequency to get good spurious performance. 2. References 1. LMX2531 datasheet 2. LMX2531LQ2080E EvaluaTIon Board OperaTIng Instructions 3. AN-1879 Fractional N frequency synthesis, Dean Banerjee
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