Design of Broadband Communication System Based on Single Carrier Frequency Domain Equalization System

Abstract: Single-Carrier Frequency Domain Equalization (SC-FDE) is an effective technique for overcoming multipath fading in digital communications. The single-carrier frequency domain equalization system is designed in the broadband communication system to achieve a 27.5 Mbps symbol transmission rate under the 137.5 MHz carrier. At the same time, the 1/2-rate convolutional code and the 238-223 Reed-Solomon (RS) code cascading channel error correction coding are added to the system to improve the reliability of the system. The design of single-carrier frequency domain equalization system is completed, and the key technologies of the design system are analyzed. Finally, the system is implemented, debugged and verified on the field programmable gate array hardware platform, and the actual bit error rate of the system is tested.

基于单载波频域均衡系统的宽带通信系统设计

In modern wireless digital communication systems, the transmission of signals changes from narrowband to wideband, while the channel of broadband wireless communication is a multipath channel with frequency selective fading. The delay spread caused by multipath effects leads to severe Inter Symbol Interference (ISI), which seriously affects the reliability of communication. Therefore, an effective method is needed to resist the influence of the channel [1]. Currently proposed methods are: Single Carrier TIme Domain Equaliza (TI-SC), Single Carrier Frequency Domain Equaliza (TI-SCDE) and Orthogonal Frequency Division Multiplexing (Orthogonal Frequency Division Multiplexing). Division MulTIplexing, OFDM) technology. SC-TDE uses an adaptive equalizer at the receiving end to compensate for intersymbol interference [2]. Its main component is one or more transversal filters, and the number of tap coefficients of the transversal filter is determined by the multipath delay. Large delays in high speed wireless communication systems can result in high complexity. In the long-term evolution plan of the 3GPP (3rd Generation Partnership Project), a scheme of adopting single-carrier technology for uplink and OFDM technology for downlink is proposed.

The OFDM system modulates data symbols into orthogonal subcarriers in parallel by Inverse Fast Fourier Transform (IFFT) at the transmitting end, which overcomes the influence of frequency selective fading and achieves equalization in the frequency domain. Its spectrum utilization is high, system complexity is low (proportional to the logarithm of channel maximum delay spread), but it is sensitive to timing error and carrier synchronization, and multiple subcarriers of each OFDM symbol are generated in time domain superposition. A large peak-to-average power ratio requires a higher RF front end. SC-FDE technology combines the advantages of OFDM technology and single-carrier transmission [3-5], while the literature [6] analysis indicates that for general SC-FDE and OFDM systems, the error performance of OFDM systems is low at low SNR. Better than SC-FDE system, SC-FDE system is better than OFDM system at high SNR. The system designed in this paper can achieve a 27.5 Mbps symbol transmission rate under the 137.5 MHz carrier, realizing a wideband SC-FDE system.

1 System Design 1.1 SC-FDE System Model

In the traditional single-carrier system, the receiver is mainly composed of modules such as A/D conversion, mixing filtering, channel estimation, and channel equalization [7-8]. In this paper, the channel coding and decoding module is added to the single carrier frequency domain equalization transmission system to obtain better bit error rate performance. The system uses a 1/2 code rate convolutional code and RS code cascaded scheme. In order to improve the transmission rate of the system, Quadrature Phase Shift Keying (QPSK) modulation is used. The system block diagram is shown in Figure 1.

Figure 1 SC-FDE system block diagram

Figure 1 SC-FDE system block diagram

1.2 System frame structure

The data frame structure used in the single-carrier frequency domain equalization system is based on a unique word (Uniform Word, UW) frame structure, and the receiving end uses UW to perform frame synchronization, channel estimation, and cyclic prefix functions. The sequence as a UW should satisfy both small fluctuations in both the time domain and the frequency domain. Common UW words include Newsman sequence, Frank-Zadoff sequence, and so on. This article uses a pseudo-superimposed sequence (Zadoff-Chu) sequence, which is defined as:

Design of Broadband Communication System Based on Single Carrier Frequency Domain Equalization System


Where: N is the length of the sequence; r is a positive integer that is mutually prime with N; q takes any value.

The Zadoff-Chu sequence algorithm has excellent performance in various channel environments. The Zadoff-Chu sequence has good periodic autocorrelation and cross-correlation properties, its amplitude is constant, and it has Fourier transform retention characteristics.

The system transmission frame consists of 2 identical 64-bit Zadoff-Chu sequences and 1 920 data bits, as shown in Figure 2. The 2-segment Zadoff-Chu sequence at the beginning of each frame is used as a cyclic prefix to perform functions such as frame synchronization, channel estimation, and noise estimation. Data frames are continuously transmitted [9].

Figure 2 system frame structure

Figure 2 system frame structure

Figure 3 Three-state synchronization diagram

Figure 3 Three-state synchronization diagram

2 Key Technologies in Wideband Single-Carrier Frequency Domain Equalization System 2.1 Frame Synchronization and Frequency Offset Estimation

This design uses UW to complete frame synchronization, and performs correlation operations on the two 64-bit Zadoff-Chu sequences of each received header and the local Zadoff-Chu sequence. Due to the sequence autocorrelation property, a pair of correlation peaks are obtained. Ideally) or a pair of main peaks and several pairs of secondary peaks (multipath exists). The peak search is completed based on the correlation peak, and the signal frame synchronization is finally completed [10].

Frame synchronization is done using a finite state machine design. The state machine implementation uses a three-state synchronization mechanism based on the search state-synchronous state-protected state, as shown in Figure 3.

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