Tensilica helps Hisense digital TV SOC chip to achieve the best in the industry

Core Tips for Electronic Enthusiasts : Tensilica announced yesterday that Hisense Group Co., Ltd. in Qingdao, China will use Tensilica HiFi audio/voice DSP (Digital Signal Processor) to design a new digital TV SOC chip for audio codec and post-processing. Tensilica's HiFi audio/voice DSP is the most popular audio IP core on the market for its low power consumption and the ability to provide more than 100 optimized software codec algorithm libraries.

Liu Weidong, general manager of Hisense IC design subsidiary Hisense Xinxin, said: "In order to create a special product, we decided to independently develop digital TV chips, which requires the supporting audio DSP to be compatible with all audio standards worldwide and support the highest level of sound fidelity. At the same time with low power consumption and small area, Tensilica's HiFi Audio DSP is the industry's leading IP core, with the widest range of audio codecs and audio/voice pre- and post-processing software libraries, and has been rigorously optimized to help us accelerate the chip design process. ."

Larry Przywara, Senior Director of Multimedia Marketing at Tensilica, said: "The global market share of Hisense Digital TV is increasing. Hisense is also constantly improving the audio and video specifications of its products. We are pleased to see that Hisense has chosen Tensilica products to help Sound fidelity is at the highest level in the industry. We look forward to seeing the launch of the new Hisense digital TV with Tensilica audio DSP next year."

Tensilica HiFi Audio DSP is the industry's leading audio DSP IP core and has been licensed by more than 50 customers, including 10 of the world's top 20 semiconductor companies and many industry-leading system OEMs. HiFi Audio DSP supports over 100 audio and speech codec algorithms for low power and high efficiency processing. HiFi Audio DSP is an important part of the Tensilica Data Processor (DPU) product line for challenging, computationally intensive SOC designs.

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